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code:fpga_map_gen5 [2024/04/03 03:10] – [AWB] Igor Yefmovcode:fpga_map_gen5 [2024/04/03 14:27] – [FPGA basic status and controls] Igor Yefmov
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 ^Address ^Name ^Bytes ^Access ^Bit mapping ^Notes ^ ^Address ^Name ^Bytes ^Access ^Bit mapping ^Notes ^
 |''0x5000'0000''|:!: FPGA Version|  4  |R/O| see [[code#firmware_version_info|Firmware Version Info]] | | |''0x5000'0000''|:!: FPGA Version|  4  |R/O| see [[code#firmware_version_info|Firmware Version Info]] | |
-|''0x5000'0004''|:!: FPGA status|  4  |R/O|see Notes for more details\\ \\ ''31:16'' [[code:code#FPGA config status - SPI codes|SPI codes]]\\ ''15:8'' FPGA core temperature\\ ''7:2'' reserved\\ ''1'' DPC done\\ ''0'' SFP active| The bytes of the FPGA status register are allocated according to the little-ending memory layout of the following C-style declaration. \\ For details on ''%%SpiCodeStruct%%'' see [[code:code#FPGA config status - SPI codes|SPI codes]]:\\ <code c++>+|''0x5000'0004''|:!: FPGA status|  4  |R/O|see Notes for more details\\ \\ ''31:16'' [[code:code#FPGA config status - SPI codes|SPI codes]]\\ ''15:8'' FPGA core temperature\\ ''7:2'' reserved\\ ''1'' DPC done\\ ''0'' SFP active| The bytes of the FPGA status register are allocated according to the little-ending memory layout of the following C-style declaration((For details on ''spi_config_status'' see [[code:code#FPGA config status - SPI codes|SPI codes]])):\\ <code c++>
 struct FpgaStatus{ struct FpgaStatus{
   struct State{   struct State{
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   } state;   } state;
   uint8_t core_temperature;   uint8_t core_temperature;
-  SpiCodeStruct config_status;+  uint16_t spi_config_status;
 };</code> | };</code> |
  

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