Differences
This shows you the differences between two versions of the page.
Both sides previous revisionPrevious revisionNext revision | Previous revision | ||
code:code [2024/02/17 15:59] – [FPGA Version Info] Igor Yefmov | code:code [2024/04/02 09:00] (current) – Igor Yefmov | ||
---|---|---|---|
Line 1: | Line 1: | ||
- | Controlling the camera is done via writing " | + | ====== Preface ====== |
- | - standard UVC - this one is automagically supported by any UVC 1.1 compliant OS, which in the year 2017 would be "any modern OS". This interface covers the universally standardized controls for [[https:// | + | |
- | - (Gen 3 and Gen 4) direct I²C access via Cypress' | + | |
- | - FX3 Host Vendor Command Interface - this interfaces with the Cypress' | + | |
- | - FPGA I²C Access - a " | + | |
- | The last two ([[code:fx3_hvci_and_fpga_i_c_commands# | + | Controlling the camera is done via writing " |
+ | - [[https:// | ||
+ | - [[fx3_api|FX3 Host Vendor Command Interface]] - this interfaces with the Cypress' | ||
+ | - [[fpga_registers_map|FPGA I²C Access]] - a " | ||
+ | - (Gen 3 and Gen 4) direct | ||
If you are set on writing your own UI and don't want to be bothered too much with figuring out how to communicate with the camera you have an option of using the [[code: | If you are set on writing your own UI and don't want to be bothered too much with figuring out how to communicate with the camera you have an option of using the [[code: | ||
Line 72: | Line 72: | ||
static_assert(sizeof(FwVersion) == 4); | static_assert(sizeof(FwVersion) == 4); | ||
</ | </ | ||
- | |||
===== FX3 Version Info ===== | ===== FX3 Version Info ===== | ||
Line 90: | Line 89: | ||
|5|Gen 4 camera, a.k.a. " | |5|Gen 4 camera, a.k.a. " | ||
|6|Gen 5 camera, either " | |6|Gen 5 camera, either " | ||
- | ^ Release type ^^ | ||
- | |0|Private build: Private build for debugging and similar purposes | | ||
- | |1|Alpha: feature-incomplete early development cycle " | ||
- | |2|Beta: feature-complete, | ||
- | |3|Evaluation: | ||
- | |4|Release candidate: feature complete and stable | | ||
- | |5|Release: general availability | | ||
- | |6|Backport: | ||
- | |7|Emergency bug fix: a critical post-release bugfix | | ||
- | ^ Build number | ||
- | |# | ||
- | |||
===== FPGA Version Info ===== | ===== FPGA Version Info ===== | ||
Line 109: | Line 96: | ||
==== Vendor ID that represents a vendor of the main computation unit ==== | ==== Vendor ID that represents a vendor of the main computation unit ==== | ||
|Code |Value | | |Code |Value | | ||
+ | ^ Vendor ID((represents a vendor of the main computation unit)) | ||
|1|Xilinx (AMD)| | |1|Xilinx (AMD)| | ||
|2|Altera (Intel)| | |2|Altera (Intel)| | ||
- | + | ^ | |
- | ==== | + | |
- | |Code |Value | | + | |
|1|Artix-7 100T| | |1|Artix-7 100T| | ||
|2|Artix-7 200T| | |2|Artix-7 200T| | ||
|3|Artix %%UltraScale+%% XCAU25P| | |3|Artix %%UltraScale+%% XCAU25P| | ||
- | + | ^ | |
- | ==== | + | |
- | |Code |Value | | + | |
|1|Cyclone 10 GX| | |1|Cyclone 10 GX| | ||
- | + | ^ | |
- | ==== | + | |
- | |Code |Value | | + | |
|1|reserved| | |1|reserved| | ||
|2|reserved| | |2|reserved| | ||
Line 132: | Line 114: | ||
|7|Gen 5 camera, professional grade " | |7|Gen 5 camera, professional grade " | ||
- | ==== | + | ===== Shared parts of the Version Info ===== |
+ | Both types of Version Infor (FX3 and FPGA) share the same codes for defining build type and build number: | ||
|Code |Value | | |Code |Value | | ||
- | |0|Private build| | + | ^ Release type ^^ |
- | |1|Alpha| | + | |0|Private build: Private build for debugging and similar purposes |
- | |2|Beta| | + | |1|Alpha: feature-incomplete early development cycle " |
- | |3|Eval/Tech preview| | + | |2|Beta: feature-complete, |
- | |4|Release candidate| | + | |3|Evaluation: |
- | |5|Release| | + | |4|Release candidate: feature complete and stable |
- | |6|Backport| | + | |5|Release: general availability |
- | |7|Emergency bug fix| | + | |6|Backport: backport of a feature from next gen camera |
+ | |7|Emergency bug fix: a critical post-release bugfix | | ||
+ | ^ Build number | ||
+ | |# | ||
- | ==== Build number | ||
- | |Code |Value | | ||
- | |# | ||
+ | ---- | ||
+ | Previous iterations had different bit layout for the Version Info, see details here: [[Firmware Versioning Evolution]] | ||
+ | ---- | ||
+ | |||
+ | ====== FPGA config status - SPI codes ====== | ||
+ | These are the status bits that indicate the FPGA programming (reconfiguring) process: | ||
+ | ^ Bit name ^ Description ^ | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||