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code:code [2017/10/12 17:25] – Igor Yefmov | code:code [2024/04/02 08:55] – Igor Yefmov | ||
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+ | ====== Preface ====== | ||
+ | |||
Controlling the camera is done via writing " | Controlling the camera is done via writing " | ||
- | - standard UVC - this one is automagically supported by any UVC 1.1 compliant OS, which in the year 2017 would be "any modern OS". This interface covers the universally standardized controls for [[https:// | + | - [[https:// |
- | - direct I²C access via Cypress' | + | - [[fx3_api|FX3 Host Vendor Command Interface]] |
- | | + | |
- | - FPGA I²C Access | + | - (Gen 3 and Gen 4) direct I²C access via Cypress' |
+ | |||
+ | If you are set on writing your own UI and don't want to be bothered too much with figuring out how to communicate | ||
+ | |||
+ | ====== More details ====== | ||
+ | %%SUB2r%% camera is built on a Cypress FX3 chipset that facilitates the '' | ||
+ | |||
+ | On Windows the device is registered with a GUID '' | ||
+ | |||
+ | Here's a sample code that shows how to send commands to both the FX3 Host (defined on this page) and to access '' | ||
+ | |||
+ | <code c++>// set a new auto-functions' | ||
+ | // just issue the command directly to FX3's vendor request interface | ||
+ | void setAUInterval(){ | ||
+ | S2R::FX3 fx3; | ||
+ | fx3.open(0); | ||
+ | fx3.vrCmd(S2R:: | ||
+ | } | ||
+ | |||
+ | // run DPC calibration - also just a straight-up vendor request command | ||
+ | void runDPC(UCHAR _threshold = 240){ | ||
+ | S2R::FX3 fx3; | ||
+ | fx3.open(0); | ||
+ | fx3.vrCmd(S2R:: | ||
+ | } | ||
+ | |||
+ | // increase LED's green brightness by 25% | ||
+ | // utilize | ||
+ | void lightUpTheGreen(){ | ||
+ | using Cmd = S2R:: | ||
+ | using OpType = S2R:: | ||
+ | |||
+ | S2R::FX3 fx3; | ||
+ | fx3.open(0); | ||
+ | uint8_t | ||
+ | // LED green is mapped to register 0x0A ONLY for Gen3 and Gen4, won't work for Gen5 | ||
+ | const uint16_t clrChannel{0x0A}; | ||
+ | fx3.vrCmd(Cmd:: | ||
+ | buf[0] += buf[0] / 4; // yes, this can totally overflow | ||
+ | fx3.vrCmd(Cmd:: | ||
+ | } | ||
+ | </ | ||
+ | |||
+ | ---- | ||
+ | |||
+ | ====== Firmware Version Info ====== | ||
+ | This applies to both FX3 and FPGA firmware version info data structures. | ||
+ | |||
+ | ===== Bit layout ===== | ||
+ | The bits are laid out in 4 sequential bytes as follows: | ||
+ | ^ 3 ^^^^^^^^ | ||
+ | ^ 7 ^ 6 ^ 5 ^ 4 ^ 3 ^ 2 ^ 1 ^ 0 ^ 7 ^ 6 ^ 5 ^ 4 ^ 3 ^ 2 ^ 1 ^ 0 ^ 7 ^ 6 ^ 5 ^ 4 ^ 3 ^ 2 ^ 1 ^ 0 ^ 7 ^ 6 ^ 5 ^ 4 ^ 3 ^ 2 ^ 1 ^ 0 ^ | ||
+ | | buildNo[12: | ||
+ | |||
+ | ===== Firmware version info C/ | ||
+ | The FX3 version structure is as follows (little-endian memory layout): | ||
+ | |||
+ | <code cpp firmware-version.h> | ||
+ | struct FwVersion{ | ||
+ | unsigned vendorId | ||
+ | unsigned hwCfgId | ||
+ | unsigned productId | ||
+ | unsigned releaseType : 3; | ||
+ | unsigned buildNo | ||
+ | }; | ||
+ | static_assert(sizeof(FwVersion) == 4); | ||
+ | </ | ||
+ | |||
+ | Both types of Version Infor (FX3 and FPGA) share the same codes for defining build type and build number: | ||
+ | |Code |Value | | ||
+ | ^ Release type ^^ | ||
+ | |0|Private build: Private build for debugging and similar purposes | | ||
+ | |1|Alpha: feature-incomplete early development cycle " | ||
+ | |2|Beta: feature-complete, | ||
+ | |3|Evaluation: | ||
+ | |4|Release candidate: feature complete and stable | | ||
+ | |5|Release: general availability | | ||
+ | |6|Backport: | ||
+ | |7|Emergency bug fix: a critical post-release bugfix | | ||
+ | ^ Build number | ||
+ | |# | ||
+ | |||
+ | |||
+ | ===== FX3 Version Info ===== | ||
+ | The version id is also encoded into the firmware image file name as: | ||
+ | < | ||
+ | |||
+ | |Code |Value | | ||
+ | ^ Vendor ID ^^ | ||
+ | |1|Cypress| | ||
+ | ^ Hardware ID ^^ | ||
+ | |1|FX3 Gen1| | ||
+ | ^ Product ID ^^ | ||
+ | |1|reserved for Gen 1 camera, a.k.a. "Moon landing" | ||
+ | |2|reserved for Gen 2 camera, a.k.a. " | ||
+ | |3|Gen 3 camera (Alpha), a.k.a. " | ||
+ | |4|Gen 3 camera, Production| | ||
+ | |5|Gen 4 camera, a.k.a. " | ||
+ | |6|Gen 5 camera, either " | ||
+ | |||
+ | ===== FPGA Version Info ===== | ||
+ | The version id is also encoded into the firmware image file name as: | ||
+ | < | ||
+ | |||
+ | ==== Vendor ID that represents a vendor of the main computation unit ==== | ||
+ | |Code |Value | | ||
+ | ^ Vendor ID((represents a vendor of the main computation unit)) | ||
+ | |1|Xilinx (AMD)| | ||
+ | |2|Altera (Intel)| | ||
+ | ^ Hardware ID for %%VendorId%% '' | ||
+ | |1|Artix-7 100T| | ||
+ | |2|Artix-7 200T| | ||
+ | |3|Artix %%UltraScale+%% XCAU25P| | ||
+ | ^ Hardware ID for %%VendorId%% '' | ||
+ | |1|Cyclone 10 GX| | ||
+ | ^ Product ID ^^ | ||
+ | |1|reserved| | ||
+ | |2|reserved| | ||
+ | |3|Gen 3 camera (Alpha), a.k.a. " | ||
+ | |4|Gen 3 camera, Production| | ||
+ | |5|Gen 4 camera, a.k.a. “Vitreledonella”| | ||
+ | |6|Gen 5 camera, prosumer grade " | ||
+ | |7|Gen 5 camera, professional grade " | ||
+ | |||
+ | ---- | ||
+ | Previous iterations had different bit layout for the Version Info, see details here: [[Firmware Versioning Evolution]] | ||
+ | ---- | ||
+ | |||
+ | ====== FPGA config status - SPI codes ====== | ||
+ | These are the status bits that indicate the FPGA programming (reconfiguring) process: | ||
+ | ^ Bit name ^ Description ^ | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
+ | |'' | ||
- | The last two (FX3 HVCI and FPGAI²C) are described in [[code:FX3 HVCI and FPGA I²C commands]]. |